Data Acquisition (DAQ) and Control from Microstar Laboratories

Knowledge Base: Hardware

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Q10102 Connecting DAP boards for synchronized clocking

Tags: Help, cable, synchronization, simultaneous sampling, master/slave, multi-DAP, large systems

Applies to: DAP and iDSC board families, MSCBL078, MSCBL101-01, MSCBL 015-01

How do I connect multiple DAP boards so that they all "clock in" data samples at the same time?

For systems with rigorous requirements to capture large numbers of signal channels in a tightly coordinated manner, iDSC and DAP boards provide hardware connections that allow boards to be "slaved together" so that operations are synchronized at the electronic level. This can be an important feature for systems that have a large number of channels to be captured in a coordinated manner, or systems that operate over a long enough time periods that microscopic differences in the sampling clock rates from board to board can affect the number of samples collected.

To set up this kind of configuration, a special cable must be used. It is special in the sense of rarely needed rather than unusual components. The synchronization cable goes from board to board, connecting the pins on the synchronization connectors together in parallel. For iDSC boards, the connectors are identified as J3 and require a MSCBL078. For the DAP family boards, the connectors are typically identified as J13 and require a MSCBL101-01. The cables are relatively easy to build, and you also have options to make your own. See the references for more information about building your own synchronization cables. The two board families are not compatible, but you can mix different DAP board models, as long as the lower-speed models are not driven beyond their rated sampling speed by a higher-speed model. The manual for your board provides more information about the connectors and their locations.

These connections are intended to be internal to the host machine where these board reside in common. Since these signals are absolutely critical to the sampling hardware timing, the quality of these signals is absolutely critical as well. Any time-skew, band-limiting distortions, or noise will result in loss of synchronization. The signals are equivalent to precision TTL timing signals on internal traces of the boards, so there is not enough drive power for long cables.

The special connections take effect when the DAP or iDSC boards are configured either as a master so that they write timing signals to the cable lines, or as a slave so that they listen to timing signals arriving on the cable lines. Configuration for iDSC boards is done through DSCView software or similar applications; configuration for DAP boards is done through DAPL configuration commands.


  • Knowledge base article Q10103 discusses the master/slave software configurations necessary to operate boards that use synchronization cables.
  • Knowledge base article Q10063 discusses building synchronization cables for the DAP family.
  • Knowledge base article Q10093 discusses building synchronization cables for the iDSC family.