Input Triggering Technology
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Input Triggering with Burst Mode and CLC
After triggering, each external clocking pulse initiates capture of a sample for every channel using the internal clock. Software control shuts down the sampling process when a sufficient number of samples has been collected. Sampling does not resume until enabled by the next triggering signal.
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A DAPserver can be the answer for rugged testing environments. Destructive tests often use hardware triggering to initiate data collection. The same signal that releases the test also activates sampling. |
Notes:
- Trigger is active high, held for at least
tTrigMin - All clock levels must be held for at least
tExtClkPW - Clocking activity begins
tTCsetupafter triggering goes active - Switch to internal clock, synchronize after
tSynch - Sample until every channel in the channel list gets a value
- Resume sampling activity with each external clock pulse
- Software control ends burst after the data set is collected
- Digitized values issued after conversion delay
- No further sampling activity until the next triggering pulse